Nintendo Entertainment System · build log

A second FPGA family: the PYNQ-Z2

October 27, 2026

The NES runs on an AMD Zynq-7020, on a TUL PYNQ-Z2, built entirely with the open-source openXC7 toolchain, and every test gives the Tang boards’ CRCs: nestest, the save-state round trip, all 42 PPU test ROMs, and HDMI at 720p, checked by checksum and through the capture device. The parts it shares with the Tang boards now count as Portable: verified on two FPGA families.

Getting there turned up four limits of the toolchain, each worked around in the board’s own files or in a part that now avoids it on every board: clock settings with fractions came out wrong, the ninth bit of a 9-bit-wide block RAM was lost, deep memories built from cascaded block RAM couldn’t be placed, and the timing varied widely from one placement to the next.

The NES palette grid, three times its size and centred on a black widescreen picture, as it arrives over HDMI. — full_palette at 720p over HDMI from the PYNQ-Z2, grabbed by a USB capture device: the frame the check compares, pixel for pixel, with the one the console drew. retro-silicon on the TUL PYNQ-Z2, captured over HDMI; test ROM by blargg, CC BY 4.0.