About
retro-silicon is an open library of FPGA parts for rebuilding retro systems: CPUs, video and sound chips, memory controllers, and the systems built from them. The code is at github.com/particlesector/retro-silicon.
How the cores are verified
A core is only as good as the evidence that it behaves like the original. Each part goes through the same steps.
Simulation first. Every part has tests that run in Verilator, a simulator that turns the hardware description into a fast C++ model. Where there’s a software model to compare against, the tests use it: the 6502 CPU runs in lockstep with perfect6502, a transistor-level simulation of the real chip, for millions of half-cycles.
Against a reference emulator. A whole system runs community test ROMs, small programs written to probe one behaviour each, such as sprite timing or an unusual opcode. The same ROMs run in a reference emulator (MesenCE for the NES). Rather than comparing pictures by eye, the core and the emulator each compute a CRC-32 checksum of a chosen frame’s raw pixel values, and the two must match exactly. For the CPU, a checksum of every bus cycle (the trace CRC) does the same job.
Then on real boards, at least two. The same tests run on FPGA boards, driven over a serial link by a test shell built into each system. A board result counts only if it gives the same checksums as the simulation. A part is marked Portable once it has passed on two boards from different FPGA families: different vendors’ chips and toolchains catch different mistakes. Today those are Sipeed’s Tang boards (Gowin FPGAs, built with the open-source Yosys, nextpnr and Apicula) and the TUL PYNQ-Z2 (an AMD Zynq, built with the open-source openXC7).
Save states, round trip. A system can save its whole state partway through a test, be reset, restore it and finish, and must give the same checksums as an uninterrupted run. The saved state can even move between boards: started on one, finished on another.
Video out, checked too. The picture on HDMI is checked twice: a checksum of every symbol sent to the display, matched against the simulation, and a capture of the screen through a USB capture device, compared pixel by pixel with the frame the system drew.
What the levels mean
| Level | Meaning |
|---|---|
| Planned | On the roadmap, not started |
| In progress | Started; its simulation tests don’t all pass yet |
| Sim passing | Every simulation test passes |
| Board verified | And the latest run on a board, of a system that uses it, passed every test |
| Portable | Verified on two boards from different FPGA families |
A board result turns stale when the part changes after that run, until the next run.
Licence
The code is Apache-2.0. This site’s text and its own images and audio are CC BY 4.0: reuse them with credit to retro-silicon. Third-party images carry their own credit and licence. Screenshots come only from open test ROMs and homebrew running on retro-silicon’s cores; the site never shows commercial games and never links to ROM files.